Digital IC Design Engineer

Some Chinese corporations need a lot of R&D talents and talents will work in major city of China. Candidates expected: Top 20 University in Russia. Bachelor degree or above. Majoring in IC, micro electrics, computer engineering, Electronics Engineering, Communication Engineering, etc. At least 3-year R&D working experience in signal processing, Algorithm, FPGA, etc. Responsibilities: Evaluate area of semiconductor and module, participate in early stage of Cadence IC Design-Virtuoso Floor-planning. Implement back-end design work including Floor Plan, APR, CTS, etc. Implement Cadence IC Design-Virtuoso physical verification including DRC, LVS and ERC. Assist front-end engineer to fulfill STA, Power analysis and SI analysis, optimize area, time sequence and power. Export GDS and Tapout. Requirements: Master or above in micro electronics, Electronic Engineering, Communications or relative major. Familiar with back-end EDA tools and back-end design flow. Familiar with Perl, tcl, Shell and other Script languages. Familiar with Timing ECO. Participate in STA analysis of project actively. Team work. Additional benefits: Relocation to China Free accomodation A return ticket once a year Visa fee Monthly living allowance Commercial insurance Annual leave