Middle FPGA Engineer

компания "ventra" about us we focus on bringing creativity to fpga design by combining open-source fpga methodology with proprietary technologies that enable a faster design-to-silicon turnaround. our employees work on innovative ai-enhanced eda tools to provide the most optimized design result that satisfies the needs in general-purpose or domain-specific applications. responsibilities now we are looking for a self-driven middle fpga engineer who is going to develop our fpga place and route solution. your ability to navigate multi-million lines source code base, both open and close source, define code restructuring tasks, evaluate different open-source components for readiness and integration into an industrial strength software will make you an invaluable asset to the fast-paced, dynamic fpga software r&d team. required skills: high level of c++ structural verilog synopsys design constraints static timing analysis fpga place and route algorithms (simulated annealing, analytical placer, routing algorithms) troubleshooting experience in timing convergence issues. preferred skills: cmake github ci/cd (github workflows) working conditions: decent salary level voluntary health insurance flexible remote work options